1. Field of the Invention
This invention relates to semiconductor devices and circuits, and more particularly to protective devices and circuits for preventing breakdown or rupture of the gate oxide of an insulated gate field effect transistor.
2. Description of Prior Art
Protective diodes and gated diodes for insulated gate field effect transistors are well known in the art as evidenced by U.S. Pat. No. 3,403,270 (Pace, et al) and U.S. Pat. No. 3,787,717 (Fisher, et al), respectively. It is also known in the art to protect the thin oxide of a protective device by suitable circuitry as evidenced by U.S. Pat. No. 3,395,290 (Farina, et al) or U.S. Pat. No. 3,746,946 (Clark). It has been found that the thin oxide of a protective device is exposed to greater over voltage stress than the thin oxide of the protected or internal device. Failure of the protective device results in a short circuit between an input terminal and substrate which renders the protected device and/or array inoperative whereas in fact the protected device or array is operative. The prior art does not show how a protective device may be improved to withstand over voltage stress by additional elements or tailoring of metallurgical junctions or limiting or controlling the secondary breakdown effects which are the predominant modes of failure. Reducing the failure modes of protective devices will increase manufacturing yield, lower cost and make the benefits of large scale integration more available to the public.